1. Field of the Invention
The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to a technique for improvement in characteristics of an input protection circuit in an LSI.
2. Description of the Background Art
In a MOSFET, a well-known method for effectively enhancing a proof stress against variation in voltage amplitude of an input signal which is applied to a source/drain region is formation of a silicide protection. This method is, for example, to form an SiO2 film over a gate electrode and side walls and then forming silicide on a surface portion of an n+-type layer uncovered with the SiO2 film as shown in FIG. 33, thereby raising a resistance of the source/drain region near the gate electrode without forming silicide on the region.
In a MOS structure using SOI (Silicon On Insulator), however, since the SOI layer is very thin (e.g., its thickness is about 1000 xc3x85), the SOI layer is etched in an etching to form the SiO2 film for silicide protection. If the SOI layer is etched, too, part of the SOI layer becomes thin because of level difference and the silicide layer which should originally extend from a surface of the SOI layer to the inside thereof reaches an interface between the SOI layer and a buried oxide film, to disadvantageously cause a leakage current and remove the silicide film.
This will be discussed below with reference to cross-sectional step views of FIGS. 29 to 35.
In order to avoid silicification of the source/drain region near the gate electrode by covering the region with the SiO2 film, usually, a series of steps shown in FIGS. 29 to 33 are carried out. Specifically, a gate electrode and source/drain regions are formed as shown in FIG. 29, and an SiO2 film is deposited as shown in FIG. 30. Next, a resist is formed on a portion of the SiO2 film which is to serve as the silicide protection portion as shown in FIG. 31, and a dry etching is performed to form an SiO2 film to serve as the silicide protection portion. After that, the unnecessary resist is removed. Then, a silicide layer is formed as shown in FIG. 34.
Since the Si layer as the SOI layer is very thin, about 1000 xc3x85, the Si layer is also etched in the dry etching and as a result a level difference as shown in FIG. 34 is created locally in a surface of the Si layer. In this condition, when silicide is formed on a prescribed uncovered portion of the source/drain region, the buried oxide film and a silicide layer come into contact as shown in FIG. 35. Since the silicide layer weakly adheres to the buried oxide film in this condition, there is a possibility that the silicide layer may be removed depending on the strength of thermal stress applied in later steps. Further, even if the silicide layer is not removed, a leakage current may be produced between two silicide layers through the buried oxide film, and therefore there may arise an appreciable influence on characteristics of a transistor such as malfunction in a transistor operation.
Regarding this point, Japanese Patent Application Laid Open Gazette 64-20663 discloses that in a dry etching for forming a side wall of a gate electrode of a MOS transistor, an Si3N4 film is formed as an etching stopper film in advance on a surface of a semiconductor layer to cover both sides of the gate electrode and a gate insulating film and then a side wall is so formed as to cover the Si3N4 film. This prior art, however, which essentially suggests a side wall of double-layered structure consisting of the Si3N4 film and the SiO2 film, can not be an effective solution of the above problem.
The present invention is directed to a semiconductor device. According to a first aspect of the present invention, the semiconductor device comprises: an underlying layer; a semiconductor layer provided on a surface of the underlying layer; a gate insulating film provided on a first region in a flat surface of the semiconductor layer; a gate electrode provided on a surface of the gate insulating film; a side wall provided on second and third regions adjacent to the first region in the flat surface of the semiconductor layer, covering side surfaces of the gate insulating film and side surfaces of the gate electrode; a first insulating film provided on fourth and fifth regions adjacent to the second and third regions, respectively, in the flat surface of the semiconductor layer, on surfaces of the side walls and on a surface of the gate electrode; a second insulating film provided on a surface of the first insulating film, being different in material from the first insulating film; a first impurity layer of the first conductivity type extending from a center portion of the first region to the inside of the semiconductor layer; a second impurity layer of the second conductivity type adjacent to the first impurity layer, extending from one of peripheral portions of the first region, the second region, the fourth region, a sixth region externally adjacent to the fourth region to the inside of the semiconductor layer; a third impurity layer of the second conductivity type adjacent to the first impurity layer, extending from the other of the peripheral portions of the first region, the third region, the fifth region, a seventh region externally adjacent to the fifth region to the inside of the semiconductor layer; a first silicide layer provided on the sixth region and inside the second impurity layer located immediately below the sixth region, of which a bottom surface is located inside the second impurity layer; and a second silicide layer provided on the seventh region and inside the third impurity layer located immediately below the seventh region, of which a bottom surface is located inside the third impurity layer.
According to a second aspect of the present invention, the semiconductor device of the first aspect further comprises: a third insulating film provided on a surface of the second insulating film.
According to a third aspect of the present invention, in the semiconductor device of the second aspect, the first insulating film and the third insulating film are of the same material.
According to a fourth aspect of the present invention, in the semiconductor device of the first aspect, the first insulating film is an SiO2 film.
According to a fifth aspect of the present invention, in the semiconductor device of the first aspect, the first insulating film is an Si3N4 film.
According to a sixth aspect of the present invention, the semiconductor device comprises: a semiconductor layer; a gate insulating film formed on a surface of the semiconductor layer; a gate electrode formed on a surface of the gate insulating film; a side wall formed on the surface of the semiconductor layer to cover side surfaces of the gate insulating film and side surfaces of the gate electrode; and first and second insulating layers formed on the surface of the semiconductor layer in this order by dry etching to cover surfaces of the side walls and a surface of the gate electrode, and in the semiconductor device, an etching rate of the second insulating layer is set larger than that of the first insulating layer in the dry etching.
According to a seventh aspect of the present invention, in the semiconductor device of the sixth aspect, a portion of the first insulating layer uncovered with the second insulating layer after the dry etching is removed by wet etching.
According to an eighth aspect of the present invention, in the semiconductor device of the seventh aspect, the first insulating layer comprises first and second insulating films of different materials, and the etching rate of the second insulating layer is set larger than that of the second insulating film adjacent to the second insulating layer.
The present invention is also directed to a method for manufacturing a semiconductor device. According to a ninth aspect of the present invention, the method comprises the steps of: (a) providing a semiconductor layer, a gate insulating film formed on a surface of the semiconductor layer, a gate electrode formed on a surface of the gate insulating film, a side wall formed on the surface of the semiconductor layer to cover side surfaces of the gate insulating film and side surfaces of the gate electrode; (b) forming a first insulating layer on surfaces of the side wall, a surface of the gate electrode and an exposed portion of the surface of the semiconductor layer; (c) forming a second insulating layer on a surface of the first insulating layer; (d) forming a resist layer on a surface of the second insulating layer and patterning the resist layer so as to be located above a surface region within a predetermined range surrounding a region in which the side wall is provided in the surface of the semiconductor layer; (e) etching the second and first insulating layers by dry etching with an etching rate of the second insulating layer set larger than that of the first insulating layer; (f) removing an exposed portion of the first insulating layer uncovered with the second insulating layer after the dry etching by wet etching; and (g) removing the resist layer.
According to a tenth aspect of the present invention, in the method of the ninth aspect, the first insulating layer comprises a first insulating film and a second insulating film, the etching rate of the second insulating layer is set larger than that of the second insulating film, the step (b) comprises the steps of (b-1) forming the first insulating film equivalent in material to the second insulating layer on the surface of the semiconductor layer; and (b-2) forming the second insulating film different in material from the second insulating layer on a surface of the first insulating film, and the step (f) comprises the steps of (f-1) removing an exposed portion of the second insulating film after the dry etching by a first wet etching; and (f-2) removing an exposed portion of the first insulating film after the first wet etching by a second wet etching.
According to an eleventh aspect of the present invention, in the method of the tenth aspect, the second insulating film is an SiO2 film.
According to a twelfth aspect of the present invention, in the method of the tenth aspect, the second insulating film is an Si3N4 film.
According to the present invention, the semiconductor device, which has a silicide protection portion covering a gate insulating film, a gate electrode and a side wall covering the side surfaces of the gate insulating film and the gate electrode, has a characteristic feature that the silicide protection portion is of layered structure, consisting essentially of a plurality of insulating films.
In the semiconductor device of the first to fifth aspects, since a plurality of insulating films are sequentially provided on the semiconductor layer, the surface of the semiconductor layer has no level difference and is flat, and the film thickness of the semiconductor layer is uniform from the first region to the sixth region. Therefore, the bottom surface of the silicide layer provided on the sixth region and in the second impurity layer never reaches the underlying layer and the problems such as the generation of leakage current and the removal of silicide film never arise.
The semiconductor device of the fourth or fifth aspect has an advantage of using a flexible and practicable insulating film, such as an SiO2 film or an Si3N4 film, as a base.
In the semiconductor device of the sixth aspect, since such a selection ratio as (the etching rate of the second insulating layer) greater than (the etching rate of the first insulating layer) is used in the dry etching, the portion of the second insulating layer to be etched is removed and then the etching is stopped at the surface of the first insulating layer. Specifically, the first insulating layer can be used as an etching stopper layer and it is possible to prevent the surface of the semiconductor layer from being etched by dry etching in forming the first and second insulating layers.
In the semiconductor device of the seventh aspect, since only the portion of the first insulating layer uncovered with the second insulating layer is removed by wet etching, a structure where the first insulating layer is formed on the surface of the semiconductor layer and the second insulating layer is formed on the surface of first insulating layer is obtained. Therefore, the exposed surface of the semiconductor layer after the wet etching is not etched and a flat surface of the semiconductor layer can be obtained. That makes it possible, for example, to form the silicide layer only on the surface of the semiconductor layer and inside the semiconductor layer when the silicide layer is formed in the semiconductor device.
In the semiconductor device of the eighth aspect, an etching stopper layer of triple-layered structure is achieved.
By the method of the ninth to eleventh aspects, (i) since the first insulating layer can work as the stopper layer for the dry etching, it is possible to prevent the surface of the semiconductor layer from being etched in the dry etching step, and (ii) since the exposed portion of the first insulating layer after the step (e) is removed by wet etching, a flat surface of the semiconductor layer that has never been etched through the process can be eventually obtained. Since the silicide layer can be thereby formed only inside the semiconductor layer without coming into contact with the interface when the silicide layer is further formed in the semiconductor device, the problems such as the generation of leakage current and the removal of silicide film never arise.
The method of the tenth aspect has an advantage that the second insulating film far away from the surface of the semiconductor layer can work as the stopper layer for dry etching.
Since the method of eleventh and twelfth aspects use the SiO2 film and the Si3N4 film as a base, it is possible to provide a flexible and practicable manufacturing technique.
In present invention, since the silicide protection causes no difference in level to be created in the surface of the semiconductor, a flat surface of the semiconductor layer can be obtained and a god silicide layer can be obtained.
An object of the present invention is to provide a semiconductor device in which a surface region of a semiconductor layer for forming a silicide layer and that for forming a silicide protection portion are even as one surface, and to provide a method for manufacturing the semiconductor device.
These and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.